"Junjun Qiu,Zheng Sun,Bangan Liu,Wenqian Wang,Dingxin Xu,Hans Herdian,Hongye Huang,Yuncheng Zhang,Yun Wang,Jian Pang,Hanli Liu,Masaya Miyahara,Atsushi Shirane,Kenichi Okada","A 32kHz-Reference 2.4GHz Fractional-N Oversampling PLL with 200kHz Loop Bandwidth",,"IEEE Journal of Solid-State Circuits","IEEE","Vol. 56","No. 12","pp. 3741-3755",2021,Dec.
". Zheng Sun,Dingxin Xu,Junjun Qiu,Zezheng Liu,Yuncheng Zhang,Hongye Huang,Hanli Liu,Bangan Liu,Zheng Li,Jian Pang,Atsushi Shirane,Kenichi Okada","A 0.25mm2 BLE Transmitter with Direct Antenna Interface and 19% System Efficiency Using Duty-Cycled Edge-Timing Calibration","IEEE European Solid-State Circuits Conference (ESSCIRC)",,,,,,2021,Sept.
"Zheng Sun,Hanli Liu,Dingxin Xu,Hongye Huang,Bangan Liu,Zheng Li,Jian Pang,Teruki Someya,Atsushi Shirane,Kenichi Okada","A Low-Jitter Injection-Locked Clock Multiplier Using 97-?W Transformer-Based VCO with 18-kHz Flicker Noise Corner",,"IEICE Transactions on Electronics",,"Vol. E104-C","No. 7","pp. 289-299",2021,July
"Zheng Sun,Dingxin Xu,Hongye Huang,Zheng Li,Hanli Liu,Bangan Liu,Jian Pang,Teruki Someya,Atsushi Shirane,Kenichi Okada","A Compact TF-based LC-VCO with Ultra-Low-Power Operation and Supply Pushing Reduction for IoT Applications",,"IEICE Transactions on Electronics",,"Vol. E103-C","No. 10","pp. 505-513",2020,Oct.
"Jian Pang,Zheng Li,Ryo Kubozoe,Xueting Luo,Rui Wu,Yun Wang,Dongwon You,Ashbir Aviat Fadila,Rattanan Saengchan,Takeshi Nakamura,Joshua Alvin,Daiki Matsumoto,Bangan Liu,Aravind Tharayil Narayanan,Junjun Qiu,Hanli Liu,Zheng Sun,Hongye Huang,Korkut Kaan Tokgoz,K. Motoi,N. Oshima,S. Hori,K. Kunihiro,T. Kaneko,A. Shirane,K. Okada","A 28-GHz CMOS Phased-Array Beamformer Utilizing Neutralized Bi-Directional Technique Supporting Dual-Polarized MIMO for 5G NR",,"IEEE Journal of Solid-State Circuits",,"Vol. 55","No. 9","pp. 2371-2386",2020,Sept.
"Yun Wang,Rui Wu,Jian Pang,Dongwon You,Ashbir Aviat Fadila,Rattanan Saengchan,Xi Fu,Daiki Matsumoto,Takeshi Nakamura,Ryo Kubozoe,Masaru Kawabuchi,Bangan Liu,Haosheng Zhang,Junjun Qiu,Hanli Liu,Naoki Oshima,Keiichi Motoi,Shinichi Hori,Kazuaki Kunihiro,Tomoya Kaneko,Atsushi Shirane,Kenichi Okada","A 39-GHz 64-Element Phased-Array Transceiver with Built-in Phase and Amplitude Calibration for Large-Array 5G NR in 65-nm CMOS",,"IEEE Journal of Solid-State Circuits",,"Vol. 55","No. 5","pp. 1249-1269",2020,May
"Jian Pang,Korkut Kaan Tokgoz,Shotaro Maki,Zeng Li,Xueting Luo,Ibrahim Abdo,Seitarou Kawai,Hanli Liu,Zheng Sun,Bangan Liu,Makihiko Katsuragi,Kento Kimura,Atsushi Shirane,Kenichi Okada","A 28.16-Gb/s Area-Efficient 60-GHz CMOS Bidirectional Transceiver for IEEE 802.11ay",,"IEEE Transactions on Microwave Theory and Technique",,"Vol. 68","No. 1","pp. 251-262",2020,Jan.
"Hanli Liu,Zheng Sun,Hongye Huang,Wei Deng,Teerachot Siriburanon,Jian Pang,Yun Wang,Rui Wu,Teruki Someya,Atsushi Shirane,Kenichi Okada","A 265-?W Fractional-N Digital PLL with Seamless Automatic Switching Sub-sampling/Sampling Feedback Path and Duty-Cycled Frequency-Locked Loop in 65nm CMOS",,"IEEE Journal of Solid-State Circuits (JSSC)",,"Vol. 54","No. 12","pp. 3478-3492",2019,Dec.
"Hongye Huang,Hanli Liu,Zheng Sun,Dingxin Xu,�õ’J �WŠî,”’�ª “ÄŽj,‰ª“c Œ’ˆê","A 2.4GHz Low-Power Subsampling/Sampling-Mixed Fractional-N All-Digital PLL","“dŽq�î•ñ’Ê�MŠw‰ï ƒ\ƒTƒCƒGƒeƒB‘å‰ï",,,,,,2019,Sept.
"Zheng Sun,Hanli Liu,Dingxin Xu,Hongye Huang,Bangan Liu,Zheng Li,Jian Pang,Teruki Someya,Atsushi Shirane,Kenichi Okada","A 78fs RMS Jitter Injection-Locked Clock Multiplier Using Transformer-Based Ultra-Low-Power VCO","IEEE European Solid-State Circuits Conference (ESSCIRC)",,,,,,2019,Sept.
"Yun Wang,Rui Wu,Jian Pang,Dongwon You,Ashbir Aviat Fadila,Rattanan Saengchan,Xi Fu,Daiki Matsumoto,Takeshi Nakamura,Ryo Kubozoe,Masaru Kawabuchi,Bangan Liu,Haosheng Zhang,Junjun Qiu,Hanli Liu,Naoki Oshima,Keiichi Motoi,Shinichi Hori,Kazuaki Kunihiro,Tomoya Kaneko,Atsushi Shirane,Kenichi Okada","A 39GHz Phased-Array CMOS Transceiver with Built-in Calibration for Large-Array 5G NR","IEEE Radio Frequency Integrated Circuits Symposium (RFIC)",,,,,,2019,June
"Dingxin Xu,Hanli Liu,Zheng Sun,Hongye Huang,Wei Deng,Teerachot Siriburanon,Jian Pang,Yun Wang,Rui Wu,�õ’J �WŠî,”’�ª “ÄŽj,‰ª“c Œ’ˆê","A 265-?W Fractional-N Digital PLL with Switching Subsampling/Sampling Feedback","“dŽq�î•ñ’Ê�MŠw‰ï LSI‚ƃVƒXƒeƒ€‚̃��[ƒNƒVƒ‡ƒbƒv",,,,,,2019,May
"Yun Wang,Bangan Liu,Rui Wu,Hanli Liu,Tn Aravind,Jian Pang,Ning Li,Toru Yoshioka,Yuki Terashima,Haosheng Zhang,Dexian Tang,Makihiko Katsuragi,Daeyoung Lee,Sungtae Choi,Kenichi Okada,Akira Matsuzawa","A 60-GHz 3.0Gb/s Spectrum Efficient BPOOK Transceiver for Low-power Short-range Wireless in 65-nm CMOS",,"IEEE Journal of Solid-State Circuits (JSSC)",,"Vol. 54","No. 5","pp. 1363-1374",2019,May
"Jian Pang,Shotaro Maki,Seitaro Kawai,Noriaki Nagashima,Yuuki Seo,Masato Dome,Hisashi Kato,Makihiko Katsuragi,Kento Kimura,Satoshi Kondo,Yuki Terashima,Hanli Liu,Teerachot Siriburanon,Tn Aravind,Nurul Fajri,Tohru Kaneko,Toru Yoshioka,Bangan Liu,Yun Wang,Rui Wu,Ning Li,Korkut Kaan Tokgoz,Masaya Miyahara,Atsushi Shirane,Kenichi Okada","A 50.1Gb/s 60-GHz CMOS Transceiver for IEEE 802.11ay with Calibration of LO Feed-Through and I/Q Imbalance",,"IEEE Journal of Solid-State Circuits (JSSC)",,"Vol. 54","No. 5","pp. 1375-1390",2019,May
"Jian Pang,Rui Wu,Yun Wang,Masato Dome,Hisashi Kato,Hongye Huang,Tn Aravind,Hanli Liu,Bangan Liu,Takeshi Nakamura,Takuya Fujimura,Masaru Kawabuchi,Ryo Kubozoe,Tsuyoshi Miura,Daiki Matsumoto,Zheng Li,Naoki Oshima,Keiichi Motoi,Shinichi Hori,Kazuaki Kunihiro,Tomoya Kaneko,Atsushi Shirane,Kenichi Okada","A 28GHz CMOS Phased-Array Transceiver Based on LO Phase Shifting Architecture with Gain Invariant Phase Tuning for 5G New Radio",,"IEEE Journal of Solid-State Circuits (JSSC)",,"Vol. 54","No. 5","pp. 1228-1242",2019,May
"Zheng Sun,Hanli Liu,Dexian Tang,Hongye Huang,‹àŽq “O,Rui Wu,Wei Deng,�õ’J �WŠî,”’�ª “ÄŽj,‰ª“c Œ’ˆê","A T/R Switch Embedded BLE Transceiver with 2.6mW Harmonic-Suppressed Transmitter and 2.3mW Hybrid-Loop Receiver�v,","“dŽq�î•ñ’Ê�MŠw‰ï LSI‚ƃVƒXƒeƒ€‚̃��[ƒNƒVƒ‡ƒbƒv",,,,,,2019,May
"Jian Pang,Zheng Li,ŒE“Y —È,Xueting Luo,Rui Wu,Yun Wang,Dongwon You,Ashbir Aviat Fadila,Rattanan Saengchan,’†‘º ŠxŽ‘,Joshua Alvin,�¼–{ ‘å‹P,THARAYILNAARAVIND,Bangan Liu,Junjun Qiu,Hanli Liu,Zheng Sun,Hongye Huang,”’�ª “ÄŽj,‰ª“c Œ’ˆê","‘o•ûŒü“®�ì‰Â”\‚È5GNR“ñ•Î”gMIMO‘Ήž28GHz‘ÑCMOSƒtƒF�[ƒYƒhƒAƒŒƒC–³�ü‹@","“dŽq�î•ñ’Ê�MŠw‰ï �W�ωñ˜HŒ¤‹†‰ï",,,"Vol. ICD2018-106","No. 507","pp. 31-35,",2019,Mar.
"Zheng Sun,Hanli Liu,Dexian Tang,Hongye Huang,Tohru Kaneko,Rui Wu,Wei Deng,Teruki Someya,Atsushi Shirane,Kenichi Okada","A 0.85mm2 BLE Transceiver with Embedded T/R Switch, 2.6mW Fully-Passive Harmonic Suppressed Transmitter and 2.3mW Hybrid-Loop Receiver","“dŽq�î•ñ’Ê�MŠw‰ï �W�ωñ˜HŒ¤‹†‰ï",,,"Vol. ICD2018-115","No. 507","pp. 81-85",2019,Mar.
"Hongye Huang,Hanli Liu,Zheng Sun,Teruki Someya,Atsushi Shirane,Kenichi Okada","An Energy-Saving Digital-to-Time Converter for Ultra-Low-Power Digital PLLs","“dŽq�î•ñ’Ê�MŠw‰ï �W�ωñ˜HŒ¤‹†‰ï",,,"Vol. ICD2018-116","No. 507","pp. 87-91",2019,Mar.
"Pang Jian,Zheng Li,Ryo Kubozoe,Xueting Luo,Rui Wu,Yun Wang,Dongwon You,Ashbir Aviat Fadila,Rattanan Saengchan,Takeshi Nakamura,Joshua Alvin,Daiki Matsumoto,Tn Aravind,Bangan Liu,Hanli Liu,Zheng Sun,Hongye Huang,Korkut Kaan Tokgoz,‘哇 ’¼Ž÷,Œ³ˆä Œjˆê,–x �^ˆê,š �O ˜a–¾,Tomoya Kaneko,Atsushi Shirane,Kenichi Okada","A 28GHz CMOS Phased-Array Beamformer Utilizing Neutralized Bi-Directional Technique Supporting Dual-Polarized MIMO for 5G NR","IEEE SSCS Japan Chapter ISSCC•ñ��‰ï",,,,,,2019,Mar.
"Hanli Liu,Zheng Sun,Hongye Huang,Wei Deng,Teerachot Siriburanon,Pang Jian,Yun Wang,Rui Wu,�õ’J �WŠî,Atsushi Shirane,Kenichi Okada","A 265-?W Fractional-N Digital PLL with Seamless Automatic Switching Subsampling/Sampling Feedback Path and Duty-Cycled Frequency-Locked Loop in 65nm CMOS","IEEE SSCS Japan Chapter ISSCC•ñ��‰ï",,,,,,2019,Mar.
"Hanli Liu,Zheng Sun,Hongye Huang,Wei Deng,Teerachot Siriburanon,Jian Pang,Yun Wang,Rui Wu,Teruki Someya,Atsushi Shirane,Kenichi Okada","A 265-?W Fractional-N Digital PLL with Seamless Automatic Switching Subsampling/Sampling Feedback Path and Duty-Cycled Frequency-Locked Loop in 65nm CMOS","IEEE International Solid-State Circuits Conference (ISSCC)",,,,,"pp. 256-257",2019,Feb.
"Jian Pang,Zheng Li,Ryo Kubozoe,Xueting Luo,Rui Wu,Yun Wang,Dongwon You,Ashbir Aviat Fadila,Rattanan Saengchan,Takeshi Nakamura,Joshua Alvin,Daiki Matsumoto,Tn Aravind,Bangan Liu,Hanli Liu,Zheng Sun,Hongye Huang,Korkut Kaan Tokgoz,Naoki Oshima,Keiichi Motoi,Shinichi Hori,Kazuaki Kunihiro,Tomoya Kaneko,Atsushi Shirane,Kenichi Okada","A 28GHz CMOS Phased-Array Beamformer Utilizing Neutralized Bi-Directional Technique Supporting Dual-Polarized MIMO for 5G NR","IEEE International Solid-State Circuits Conference (ISSCC)",,,,,"pp. 344-345",2019,Feb.
"Bangan Liu,Huy Cu Ngo,Kengo Nakata,Wei Deng,Yuncheng Zhang,Junjun Qiu,Toru Yoshioka,Jun Emmei,Jian Pang,Tn Aravind,Haosheng Zhang,Dongsheng Yang,Hanli Liu,Teruki Someya,Atsushi Shirane,Kenichi Okada","A 0.4ps-Jitter -52dBc-Spur Synthesizable Injection-locked PLL with Self-clocked Non-overlap Update and Slope-balanced Sub-sampling BBPD",,"IEEE Solid-State Circuits Letters (SSC-L)",,"Vol. 2","No. 1","pp. 5-8",2019,Jan.
"Hanli Liu,Dexian Tang,Zheng Sun,Wei Deng,Huy Cu Ngo,Kenichi Okada","A Sub-mW Fractional-N ADPLL with FOM of -246dB for IoT Applications",,"IEEE Journal of Solid-State Circuits (JSSC)",,"Vol. 53","No. 12","pp. 3540-3552",2018,Dec.
"Hanli Liu","A Study of Bluetooth Low Energy Transceiver Using Ultra-Low-Power Fractional-N Digital PLL Based on Digital-to-Time Converter",,,,,,,2018,Dec.
"Hanli Liu,Zheng Sun,Dexian Tang,Hongye Huang,Tohru Kaneko,Zhijie Chen,Wei Deng,Rui Wu,Kenichi Okada","A DPLL-Centric Bluetooth Low-Energy Transceiver with a 2.3-mW Interference-Tolerant Hybrid-Loop Receiver in 65nm CMOS",,"IEEE Journal of Solid-State Circuits",,"Vol. 53","No. 12","pp. 3672-3687",2018,Dec.
"Hanli Liu","A Study of Bluetooth Low Energy Transceiver Using Ultra-Low-Power Fractional-N Digital PLL Based on Digital-to-Time Converter",,,,,,,2018,Dec.
"Hanli Liu","A Study of Bluetooth Low Energy Transceiver Using Ultra-Low-Power Fractional-N Digital PLL Based on Digital-to-Time Converter",,,,,,,2018,Dec.
"Jian Pang,Korkut Kaan Tokgoz,Shotaro Maki,Zheng Li,Xueting Luo,Ibrahim Abdo,Seitaro Kawai,Hanli Liu,Bangan Liu,Makihiko Katsuragi,Kento Kimura,Atsushi Shirane,Kenichi Okada","A 28.16-Gb/s Area-Efficient 60GHz CMOS Bi-Directional Transceiver for IEEE 802.11ay","IEEE Asian Solid-State Circuits Conference (A-SSCC)",,,,,"pp. 77-78",2018,Nov.
"Hongye Huang,Zheng Sun,Hanli Liu,Rui Wu,Teruki Someya,Atsushi Shirane,Kenichi Okada","A 2.6mW BLE Transmitter Front-End with Fully-Passive Harmonic Suppression","“dŽq�î•ñ’Ê�MŠw‰ï ƒ\ƒTƒCƒGƒeƒB‘å‰ï",,,,,,2018,Sept.
"Zheng Sun,Hanli Liu,Dexian Tang,Hongye Huang,Tohru Kaneko,Rui Wu,Wei Deng,Kenichi Okada","A 0.85mm2 BLE Transceiver with Embedded T/R Switch, 2.6mW Fully-Passive Harmonic Suppressed Transmitter and 2.3mW Hybrid-Loop Receiver","IEEE European Solid-State Circuits Conference (ESSCIRC)",,,,,"pp. 310-313",2018,Sept.
"Zheng Sun,Hanli Liu,Hongye Huang,Teruki Someya,Atsushi Shirane,Kenichi Okada","A High Dynamic Range BLE Front-End with On-Chip Matching Network","“dŽq�î•ñ’Ê�MŠw‰ï ƒ\ƒTƒCƒGƒeƒB‘å‰ï",,,,,,2018,Sept.
"Hanli Liu,‰ª“c Œ’ˆê","Loop Latency Compensation Technique for Wide Loop Bandwidth ADPLL","“dŽq�î•ñ’Ê�MŠw‰ï ƒ\ƒTƒCƒGƒeƒB‘å‰ï",,,,,,2018,Sept.
"Teerachot Siriburanon,Hanli Liu,Kenichi Okada,Akira Matsuzawa,Wei Deng,Satoshi Kondo,Makihiko Katsuragi,Kento Kimura","IoT and Low-Power Wireless: Circuits, Architectures, and Techniques",,,"CRC Press",,,,2018,July
"Jian Pang,Rui Wu,Yun Wang,Masato Dome,Hisashi Kato,Hongye Huang,Tn Aravind,Hanli Liu,Wei Deng,Bangan Liu,Takeshi Nakamura,Takuya Fujimura,Masaru Kawabuchi,Ryo Kubozoe,Tsuyoshi Miura,Daiki Matsumoto,Naoki Oshima,Keiichi Motoi,Shinichi Hori,Kazuaki Kunihiro,Tomoya Kaneko,Kenichi Okada","A 28GHz CMOS Phased-Array Transceiver Using Gain-Invariant LO Phase Shifter with 0.1 Degree Beam-Steering Resolution for 5G New Radio","IEEE Radio Frequency Integrated Circuits Symposium (RFIC)",,,,,"pp. 56-59",2018,June
"Zheng Sun,Hanli Liu,Dexian Tang,Hongye Huang,‹àŽq “O,Wei Deng,Rui Wu,”’�ª “ÄŽj,‰ª“c Œ’ˆê","An ADPLL-Centric Bluetooth Low-Energy Transceiver with 2.3mW Interference-Tolerant Hybrid-Loop Receiver in 65nm CMOS","“dŽq�î•ñ’Ê�MŠw‰ï LSI‚ƃVƒXƒeƒ€‚̃��[ƒNƒVƒ‡ƒbƒv",,,,,,2018,May
"Hongye Huang,Hanli Liu,Dexian Tang,Zheng Sun,Wei Deng,Huy Cu Ngo,”’�ª “ÄŽj,‰ª“c Œ’ˆê","An Ultra-Low-Power Fractional-N All-Digital PLL Using 10-bit Isolated Constant-Slope Digital-to-Time Converter","“dŽq�î•ñ’Ê�MŠw‰ï LSI‚ƃVƒXƒeƒ€‚̃��[ƒNƒVƒ‡ƒbƒv",,,,,,2018,May
"Hanli Liu,Teerachot Siriburanon,Kengo Nakata,Wei Deng,Ju Ho Son,Dae Young Lee,Kenichi Okada,Akira Matsuzawa","A 28-GHz Fractional-N Frequency Synthesizer with Reference and Frequency Doublers for 5G Mobile Communications in 65nm CMOS",,"IEICE Transactions on Electronics",,"Vol. E101-C","No. 4","pp. 187-196",2018,Apr.
"Bangan Liu,Huy Cu Ngo,Kengo Nakata,Wei Deng,Yuncheng Zhang,Junjun Qiu,Toru Yoshioka,Jun Emmei,Haosheng Zhang,Jian Pang,Tn Aravind,Dongsheng Yang,Hanli Liu,Kenichi Okada,Akira Matsuzawa","A 1.2 ps-Jitter Fully-Synthesizable Fully-Calibrated Fractional-N Injection-Locked PLL Using True Arbitrary Nonlinearity Calibration Technique","IEEE Custom Integrated Circuits Conference (CICC)",,,,,,2018,Apr.
"Dexian Tang,Hanli Liu,Zheng Sun,Hongye Huang,Kenichi Okada,Akira Matsuzawa","An Isolated Constant-slope Digital-to-Time Converter","“dŽq�î•ñ’Ê�MŠw‰ï ‘��‡‘å‰ï",,,,,"  C-12-33",2018,Mar.
"Pham Van Tuan,Hanli Liu,Haosheng Zhang,Kenichi Okada,Akira Matsuzawa","A 0.65mW 4.6GHz VCO with Low Phase Noise for Chip Scale Atomic Clock","“dŽq�î•ñ’Ê�MŠw‰ï ‘��‡‘å‰ï",,,,,"  C-12-27",2018,Mar.
"Hongye Huang,Zheng Sun,Hanli Liu,Dexian Tang,Kenichi Okada,Akira Matsuzawa","Current-reuse LNA for Low Power 2.4-GHz Receivers","“dŽq�î•ñ’Ê�MŠw‰ï ‘��‡‘å‰ï",,,,,"  C-12-7",2018,Mar.
"Zheng Sun,Hanli Liu,Dexian Tang,Hongye Huang,Kenichi Okada,Akira Matsuzawa","An ADPLL-based High Interference Tolerant BLE Receiver with DAC Feedback Loop","“dŽq�î•ñ’Ê�MŠw‰ï ‘��‡‘å‰ï",,,,,"  C-12-6",2018,Mar.
"Hanli Liu,Zheng Sun,Dexian Tang,Hongye Huang,Tohru Kaneko,Wei Deng,Rui Wu,Kenichi Okada,Akira Matsuzawa","An ADPLL-Centric Bluetooth Low-Energy Transceiver with 2.3mW Interference-Tolerant Hybrid-Loop Receiver and 2.9mW Single-Point Polar Transmitter in 65nm CMOS","IEEE International Solid-State Circuits Conference",,,,,,2018,Feb.
"Hanli Liu,Dexian Tang,Zheng Sun,Wei Deng,Huy Cu Ngo,Kenichi Okada,Akira Matsuzawa","A 0.98mW Fractional-N ADPLL Using 10b Isolated Constant-Slope DTC with FoM of -246dB for IoT Applications in 65nm CMOS","IEEE International Solid-State Circuits Conference",,,,,,2018,Feb.
"Hanli Liu,Teerachot Siriburanon,Kengo Nakata,Wei Deng,Kenichi Okada,Akira Matsuzawa","A 28GHz Fractional-N Frequency Synthesizer with Reference and Frequency Doublers for 5G New Radio","“dŽq�î•ñ’Ê�MŠw‰ï �W�ωñ˜HŒ¤‹†‰ï",,,"Vol. ICD2017-89",,"pp. 147-150",2017,Dec.
"Yun Wang,Bangan Liu,Hanli Liu,Tn Aravind,Jian Pang,Ning Li,Toru Yoshioka,Yuki Terashima,Haosheng Zhang,Dexian Tang,Makihiko Katsuragi,Daeyoung Lee,Sungtae Choi,Rui Wu,Kenichi Okada,Akira Matsuzawa","A 100mW 3.0Gb/s Spectrum Efficient 60GHz Bi-Phase OOK CMOS Transceiver","IEEE Symposium on VLSI Circuits",,,,,,2017,June
"Jian Pang,áÁ–Ø ãÄ‘¾˜Y,‰Í�‡ �½‘¾˜Y,‰i“‡ “T–¾,�£”ö —L‹P,Œj–Ø �^Šó•F,–Ø‘º Œ’�«,‹ß“¡ ’qŽj,Hanli Liu,Teerachot Siriburanon,‹àŽq “O,‹{Œ´ �³–ç,‰ª“c Œ’ˆê,�¼àV �º","A 128-QAM 60GHz CMOS Transceiver for IEEE802.11ay with Calibration of LO Feedthrough and I/Q Imbalance","“dŽq�î•ñ’Ê�MŠw‰ï LSI‚ƃVƒXƒeƒ€‚̃��[ƒNƒVƒ‡ƒbƒv",,,,,,2017,May
"Jian Pang,áÁ–Ø ãÄ‘¾˜Y,‰Í�‡ �½‘¾˜Y,‰i“‡ “T–¾,�£”ö —L‹P,Œj–Ø �^Šó•F,–Ø‘º Œ’�«,‹ß“¡ ’qŽj,Hanli Liu,Teerachot Siriburanon,‰ª“c Œ’ˆê,�¼àV �º","�uIEEE802.11ay‚ÉŒü‚¯‚½CMOS ƒ~ƒŠ”gƒgƒ‰ƒ“ƒV�[ƒo�[‚ÉŠÖ‚·‚錤‹†","“dŽq�î•ñ’Ê�MŠw‰ï�W�ωñ˜HŒ¤‹†‰ï",,,"Vol. ICD2016-13",,"pp. 113-118",2017,Mar.
"Hanli Liu,Ning Li,Tn Aravind,Teerachot Siriburanon,Takeshi Inoue,Hitoshi Sakane,Takuichi Hirano,Kenichi Okada,Akira Matsuz","A -194.0dBc/Hz FoM CMOS Tail-Filtering VCO Using Helium-3 Ion Irradiation Technique","IEEE MTT-S European Microwave Conference",,,,,,2016,Oct.
"Teerachot Siriburanon,Satoshi Kondo,Makihiko Katsuragi,Hanli Liu,Kento Kimura,Wei Deng,Kenichi Okada,Akira Matsuzawa","A Low-Power Low-Noise mm-Wave Sub-Sampling PLL using Dual-Step-Mixing ILFD and Tail-Coupling Quadrature Injection-Locked Oscillator for IEEE802.11ad",,"IEEE Journal of Solid-State Circuits","IEEE","Vol. 51","No. 5","pp. 1246-1260",2016,May
"Hanli Liu,Kenichi Okada,Akira Matsuzawa","A -242dB FoM 4.2-mW ADC-PLL Using Digital Sub-Sampling Architecture","STARCƒtƒH�[ƒ‰ƒ€",,,,,,2015,Nov.
"Hanli Liu,Teerachot Siriburanon,Kenichi Okada,Akira Matsuzawa","28GHz CMOS LC-VCO Using Frequency Doubling Technique","“dŽq�î•ñ’Ê�MŠw‰ï ƒ\ƒTƒCƒGƒeƒB‘å‰ï",,,,,,2015,Sept.
"Teerachot Siriburanon,Liu Hanli,Kengo Nakata,Wei Deng,Ju Ho Son,Dae Young Lee,Kenichi Okada,Akira Matsuzawa","A 28-GHz Fractional-N Frequency Synthesizer with Reference and Frequency Doublers for 5G Cellular","IEEE European Solid-State Circuits Conference",,,,,,2015,Sept.