@article{CTT100879342, author = {Junjun Qiu and Zheng Sun and Bangan Liu and Wenqian Wang and Dingxin Xu and Hans Herdian and Hongye Huang and Yuncheng Zhang and Yun Wang and Jian Pang and Hanli Liu and Masaya Miyahara and Atsushi Shirane and Kenichi Okada}, title = {A 32kHz-Reference 2.4GHz Fractional-N Oversampling PLL with 200kHz Loop Bandwidth}, journal = {IEEE Journal of Solid-State Circuits}, year = 2021, } @article{CTT100841933, author = {Zheng Sun and Hanli Liu and Dingxin Xu and Hongye Huang and Bangan Liu and Zheng Li and Jian Pang and Teruki Someya and Atsushi Shirane and Kenichi Okada}, title = {A Low-Jitter Injection-Locked Clock Multiplier Using 97-µW Transformer-Based VCO with 18-kHz Flicker Noise Corner}, journal = {IEICE Transactions on Electronics}, year = 2021, } @article{CTT100841936, author = {Zheng Sun and Dingxin Xu and Hongye Huang and Zheng Li and Hanli Liu and Bangan Liu and Jian Pang and Teruki Someya and Atsushi Shirane and Kenichi Okada}, title = {A Compact TF-based LC-VCO with Ultra-Low-Power Operation and Supply Pushing Reduction for IoT Applications}, journal = {IEICE Transactions on Electronics}, year = 2020, } @article{CTT100841925, author = {Bangan Liu and Yuncheng Zhang and Junjun Qiu and Hongye Huang and Zheng Sun and Dingxin Xu and Haosheng Zhang and Yun Wang and Jian Pang and Zheng Li and Xi Fu and Atsushi Shirane and Hitoshi Kurosu and Yoshinori Nakane and Shunichiro Masaki and Kenichi Okada}, title = {A Fully-Synthesizable Fractional-N Injection-Locked PLL for Digital Clocking with Triangle/Sawtooth Spread-Spectrum Modulation Capability in 5-nm CMOS}, journal = {IEEE Solid-State Circuits Letters}, year = 2020, } @inproceedings{CTT100918306, author = {Yuang Xiong and Dingxin Xu and Yuncheng Zhang and 白根 篤史 and 岡田 健一}, title = {A Compact Class-F LC Oscillator with Multi-resonance Mode for Low Jitter PLL Designs}, booktitle = {}, year = 2024, } @inproceedings{CTT100918309, author = {Daxu Zhang and Yuncheng Zhang and Hongye Huang and Dingxin Xu and 白根 篤史 and 岡田 健一}, title = {A Multi-Phase Frequency Synthesizer with Injection-Locking Ring Oscillator}, booktitle = {}, year = 2024, } @inproceedings{CTT100918091, author = {Dingxin Xu and Zezheng Liu and Yifeng Kuai and Hongye Huang and Yuncheng Zhang and Zheng Sun and Bangan Liu and Wenqian Wang and Yuang Xiong and Junjun Qiu and Waleed Madany and Yi Zhang and Ashbir Aviat Fadila and Atsushi Shirane and Kenichi Okada}, title = {A 7GHz Digital PLL with Cascaded Fractional Divider and Pseudo-Differential DTC Achieving -62.1dBc Fractional Spur and 143.7fs Integrated Jitter}, booktitle = {}, year = 2024, } @inproceedings{CTT100918337, author = {Yuncheng Zhang and Zheng Sun and Bangan Liu and Junjun Qiu and Dingxin Xu and Yi Zhang and Xi Fu and Dongwon You and Hongye Huang and Waleed Madany and Ashbir Aviat Fadila and Zezheng Liu and Wenqian Wang and Yuang Xiong and Atsushi Shirane and Kenichi Okada}, title = {A Time-Mode-Modulation Digital Quadrature Power Amplifier Based on 1-bit DSM and Transformer Combined FIR}, booktitle = {}, year = 2023, } @inproceedings{CTT100918279, author = {Dingxin Xu and Yuncheng Zhang and Hongye Huang and Zheng Sun and Bangan Liu and Ashbir Aviat Fadila and Junjun Qiu and Zezheng Liu and Wenqian Wang and Yuang Xiong and Waleed Madany and Atsushi Shirane and Kenichi Okada}, title = {A 6.5-to-8GHz Cascaded Dual-Fractional-N Digital PLL Achieving -63.7dBc Fractional Spurs with 50MHz Reference}, booktitle = {}, year = 2023, } @inproceedings{CTT100896141, author = {Junjun Qiu and Wenqian Wang and Zheng Sun and Bangan Liu and Yuncheng Zhang and Dingxin Xu and Hongye Huang and Ashbir Aviat Fadila and Zezheng Liu and Waleed Madany and Yuang Xiong and Atsushi Shirane and Kenichi Okada}, title = {A 32kHz-Reference 2.4GHz Fractional-N Nonuniform Oversampling PLL with Gain Boosted PD and Loop Gain Calibration}, booktitle = {}, year = 2023, } @inproceedings{CTT100895787, author = {Dingxin Xu and Zheng Sun and Hongye Huang and 白根 篤史 and 岡田 健一}, title = {A Current-Reused Ring Oscillator with Edge-Combining Technique for BLE TX}, booktitle = {}, year = 2022, } @inproceedings{CTT100879419, author = {. Zheng Sun and Dingxin Xu and Junjun Qiu and Zezheng Liu and Yuncheng Zhang and Hongye Huang and Hanli Liu and Bangan Liu and Zheng Li and Jian Pang and Atsushi Shirane and Kenichi Okada}, title = {A 0.25mm2 BLE Transmitter with Direct Antenna Interface and 19% System Efficiency Using Duty-Cycled Edge-Timing Calibration}, booktitle = {}, year = 2021, } @inproceedings{CTT100879512, author = {Junjun Qiu and Zheng Sun and Bangan Liu and Wenqian Wang and Dingxin Xu and Hans Herdian and Hongye Huang and Yuncheng Zhang and Yun Wang and Atsushi Shirane and Kenichi Okada}, title = {200kHzループ帯域幅の32kHzリファレンス2.4GHzフラクショナルNオーバーサンプリングPLL}, booktitle = {}, year = 2021, } @inproceedings{CTT100841940, author = {Zheng Sun and Dingxin Xu and Junjun Qiu and Atsushi Shirane and Kenichi Okada}, title = {A 0.38mm2 BLE Transmitter with 29% System Efficiency Using Duty-Cycled Edge-Timing Calibration in 65nm CMOS}, booktitle = {}, year = 2021, } @inproceedings{CTT100841938, author = {Junjun Qiu and Zheng Sun and Bangan Liu and Wenqian Wang and Dingxin Xu and Hans Herdian and Hongye Huang and Yuncheng Zhang and Yun Wang and Atsushi Shirane and Kenichi Okada}, title = {A 32kHz-Reference 2.4GHz Fractional-N Oversampling PLL with 200kHz Loop Bandwidth}, booktitle = {}, year = 2021, } @inproceedings{CTT100841956, author = {Zheng Sun and Hanli Liu and Dingxin Xu and Hongye Huang and Bangan Liu and Zheng Li and Jian Pang and Teruki Someya and Atsushi Shirane and Kenichi Okada}, title = {A 78fs RMS Jitter Injection-Locked Clock Multiplier Using Transformer-Based Ultra-Low-Power VCO}, booktitle = {}, year = 2019, } @inproceedings{CTT100841990, author = {Dingxin Xu and Zheng Sun and Hongye Huang and 染谷 晃基 and 白根 篤史 and 岡田 健一}, title = {A Time-Amplifier Gain Calibration Technique for ADPLL}, booktitle = {}, year = 2019, } @inproceedings{CTT100841988, author = {Zheng Sun and Dingxin Xu and Hongye Huang and 染谷 晃基 and 白根 篤史 and 岡田 健一}, title = {A 78fs RMS Jitter Injection-Locked Clock Multiplier Using Transformer-Based Ultra-Low-Power VCO}, booktitle = {}, year = 2019, } @inproceedings{CTT100841991, author = {Hongye Huang and Hanli Liu and Zheng Sun and Dingxin Xu and 染谷 晃基 and 白根 篤史 and 岡田 健一}, title = {A 2.4GHz Low-Power Subsampling/Sampling-Mixed Fractional-N All-Digital PLL}, booktitle = {}, year = 2019, } @inproceedings{CTT100841976, author = {Dingxin Xu and Hanli Liu and Zheng Sun and Hongye Huang and Wei Deng and Teerachot Siriburanon and Jian Pang and Yun Wang and Rui Wu and 染谷 晃基 and 白根 篤史 and 岡田 健一}, title = {A 265-µW Fractional-N Digital PLL with Switching Subsampling/Sampling Feedback}, booktitle = {}, year = 2019, } @misc{CTT100923755, author = {Dingxin Xu}, title = {A Study of Fractional Spur Suppression Techniques in Digital Phase-Locked Loops}, year = , } @misc{CTT100925384, author = {Dingxin Xu}, title = {A Study of Fractional Spur Suppression Techniques in Digital Phase-Locked Loops}, year = , } @phdthesis{CTT100923755, author = {Dingxin Xu}, title = {A Study of Fractional Spur Suppression Techniques in Digital Phase-Locked Loops}, school = {東京工業大学}, year = , } @phdthesis{CTT100925384, author = {Dingxin Xu}, title = {A Study of Fractional Spur Suppression Techniques in Digital Phase-Locked Loops}, school = {東京工業大学}, year = , }