@article{CTT100809999, author = {Hiroki Nakahara and Haruyoshi Yonekawa and Tomoya Fujii and Masayuki Shimoda and Shimpei Sato}, title = {GUINNESS: A GUI based Binarized Deep Neural Network Framework for Software Programmers}, journal = {IEICE Transactions on Information and Systems}, year = 2019, } @article{CTT100772080, author = {Kota Ando and Kodai Ueyoshi and Kentaro Orimo and Haruyoshi Yonekawa and Shimpei Sato and Hiroki Nakahara and Shinya Takamaeda-Yamazaki and Masayuki Ikebe and Tetsuya Asai and Tadahiro Kuroda and Masato Motomura}, title = {BRein Memory: A Single-Chip Binary/Ternary Reconfigurable in-Memory Deep Neural Network Accelerator Achieving 1.4 TOPS at 0.6 W}, journal = {IEEE Journal of Solid-State Circuits}, year = 2018, } @inproceedings{CTT100772086, author = {Haruyoshi Yonekawa and Shimpei Sato and Hiroki Nakahara}, title = {A Ternary Weight Binary Input Convolutional Neural Network: Realization on the Embedded Processor}, booktitle = {}, year = 2018, } @inproceedings{CTT100772088, author = {Hiroki Nakahara and Haruyoshi Yonekawa and Tomoya Fujii and Shimpei Sato}, title = {A Lightweight YOLOv2: A Binarized CNN with A Parallel Support Vector Regression for an FPGA}, booktitle = {}, year = 2018, } @inproceedings{CTT100793694, author = {米川晴義 and 佐藤真平 and 中原啓貴}, title = {重み3値入出力2値ディープニューラルネットワークの学習と組込みプロセッサ実現について}, booktitle = {}, year = 2018, } @inproceedings{CTT100793684, author = {宇山拓夢 and 藤井智也 and 米川晴義 and 佐藤真平 and 中原啓貴}, title = {Intel OpenCLを用いたディープニューラルネットワークのFPGA実現に関して}, booktitle = {電子情報通信学会技術研究報告}, year = 2018, } @inproceedings{CTT100772089, author = {Hiroki Nakahara and Haruyoshi Yonekawa and Shimpei Sato}, title = {An Object Detector based on Multiscale Sliding Window Search using a Fully Pipelined Binarized CNN on an FPGA}, booktitle = {}, year = 2017, } @inproceedings{CTT100772092, author = {Hiroki Nakahara and Haruyoshi Yonekawa and Tomoya Fujii and Masayuki Shimoda and Shimpei Sato}, title = {GUINNESS: A GUI based neural network synthesizer for an FPGA}, booktitle = {}, year = 2017, } @inproceedings{CTT100772093, author = {Kota Ando and Kodai Ueyoshi and Kazutoshi Hirose and Kentaro Orimo and Haruyoshi Yonekawa and Shimpei Sato and Hiroki Nakahara and Masayuki Ikebe and Shinya Takamaeda-Yamazaki and Tetsuya Asai and Tadahiro Kuroda and Masato Motomura}, title = {In-Memory Area-Efficient Signal Streaming Processor Design for Binary Neural Networks}, booktitle = {}, year = 2017, } @inproceedings{CTT100743027, author = {Kota Ando and Haruyoshi Yonekawa and Shimpei Sato and Hiroki Nakahara and Masato Motomura}, title = {BRein memory: a 13-layer 4.2 K neuron/0.8 M synapse binary/ternary reconfigurable in-memory deep neural network accelerator in 65 nm CMOS}, booktitle = {}, year = 2017, } @inproceedings{CTT100743026, author = {Haruyoshi Yonekawa and Hiroki Nakahara}, title = {An On-chip Memory Batch Normalization Free Binarized Convolutional Deep Neural Network on an FPGA}, booktitle = {}, year = 2017, } @inproceedings{CTT100743030, author = {Hiroki Nakahara and Haruyoshi Yonekawa and Hisashi Iwamoto and Masato Motomura}, title = {A Batch Normalization Free Binarized Convolutional Deep Neural Network on an FPGA}, booktitle = {}, year = 2017, } @inproceedings{CTT100743033, author = {米川 晴義 and 中原 啓貴 and 本村 真人}, title = {ディープニューラルネットワークの2値化と3値化の比較}, booktitle = {}, year = 2017, } @inproceedings{CTT100743031, author = {米川晴義 and 中原啓貴 and 本村真人}, title = {電力性能効率に優れた二値化ディープニューラルネットワークのFPGA実装}, booktitle = {}, year = 2017, } @inproceedings{CTT100743038, author = {Hiroki Nakahara and Haruyoshi Yonekawa and Tsutomu Sasao and Hisashi Iwamoto and Masato Motomura}, title = {A Memory-Based Realization of a Binarized Deep Convolutional Neural Network}, booktitle = {}, year = 2016, } @misc{CTT100756302, author = {中原啓貴 and 米川晴義}, title = {ニューラルネットワーク回路装置、ニューラルネットワーク、ニューラルネットワーク処理方法およびニューラルネットワークの実行プログラム}, howpublished = {登録特許}, year = 2017, month = {}, note = {特願2016-235383(2016/12/02), 特開2018-092377(2018/06/14), 特許第6183980号(2017/08/04)} }