論文

• Takamasa Kawanago, Ryosuke Kajikawa, Kazuto Mizutani, Sung-Lin Tsai, Iriya Muneta, Takuya Hoshii, Kuniyuki Kakushima, Kazuo Tsutsui, Hitoshi Wakabayashi. Doping-Free Complementary Metal-Oxide-Semiconductor Inverter Based on N-Type and P-Type Tungsten Diselenide Field-Effect Transistors With Aluminum-Scandium Alloy and Tungsten Oxide for Source/Drain Contact, IEEE Journal of the Electron Devices Society, IEEE, Vol. 11, p. 15-21, Nov. 2022.  公式リンク  
  
• Takamasa KAWANAGO, Takahiro Matsuzaki, Ryosuke Kajikawa, Iriya Muneta, Takuya HOSHII, Kuniyuki Kakushima, Kazuo TSUTSUI, Hitoshi WAKABAYASHI. Experimental demonstration of high-gain CMOS Inverter operation at low Vdd down to 0.5 V consisting of WSe2 n/p FETs, Japanese Journal of Applied Physics (JJAP), Vol. 61, Feb. 2022.
• Kentaro Matsuura, Masaya Hamada, Takuya Hamada, Haruki Tanigawa, Takuro Sakamoto, Atsushi Hori, Iriya Muneta, Takamasa Kawanago, Kuniyuki Kakushima, Kazuo. Normally-off sputtered-MoS2 nMISFETs with TiN top-gate electrode all defined by optical lithography for chip-level integration, Japanese Journal of Applied Physics (JJAP) (Rapid Communication), Vol. 59, No. 8, Page 80906, Aug. 2020.
• Takamasa Kawanago, Shunri Oda. Control of threshold voltage by gate metal electrode in molybdenum disulfide fieldeffect, Applied Physics Letters, Vol. 110, 133507, Mar. 2017.
• Takamasa Kawanago, Shunri Oda. Utilizing self-assembled-monolayer-based gate dielectrics to fabricate molybdenum, Applied Physics Letters, Vol. 108, pp. 041605 (2016) 1-4, Jan. 2016.
• Takamasa Kawanago, Shunri Oda. Utilizing self-assembled-monolayer-based gate dielectrics to fabricate molybdenum disulfide field-effect transistors, Applied Physics Letters, Vol. 108, pp. 041605-5, Jan. 2016.
• "J. Chen", "T. Kawanago", "H. Wakabayashi", "K. Tsutsui", "H. Iwai", "D. Nohata", "H. Nohira", "K. Kakushima". La2O3 gate dielectrics for AlGaN/GaN HEMT, Microelectronics Reliability, Vol. 60, pp. 16-19, 2016.
• "T. Kawanago", "K. Kakushima", "Y. Kataoka", "A. Nishiyama", "N. Sugii", "H. Wakabayashi", "K. Tsutsui", "K. Natori", "H. Iwai". Gate Technology Contributions to Collapse of Drain Current in AlGaN/GaN Schottky HEMT, IEEE Transaction on Electron Devices(T-ED), Vol. 61, No. 3, pp. 785-791, Feb. 2014.
• Miranda Enrique, Takamasa Kawanago, Kuniyuki KAKUSHIMA, J.Sune, HIROSHI IWAI. Modeling of the output characteristics of advanced n-MOSFETs after a severe gate-to-channel dielectric breakdown, [Microelectronic Engineering, Vol. 109, pp. 322-325, Sept. 2013.
• Takamasa Kawanago, Kuniyuki KAKUSHIMA, パールハットアヘメト, 片岡好則, Akira Nishiyama, Nobuyuki Sugii, KAZUO TSUTSUI, takeo hattori, Kenji Natori, HIROSHI IWAI. Comparative study of electrical characteristics in(100) and (110)surface-oriented nMOSFETs with direct contact La-silicate/Si interface structure, Solid-State Electronics, Vol. 84, pp. 53-57, June 2013.
• Miranda Enrique, Takamasa Kawanago, Kuniyuki KAKUSHIMA, J. Sune, HIROSHI IWAI. Analysis and Simulation of the Postbreakdown I-V Characteristics of n-MOS Transistors in the Linear Response Regime, IEEE ELECTRON DEVICE LETTERS, Vol. 34, No. 6, pp. 798-800, June 2013.
• Takamasa Kawanago, Yeonghun Lee, Kuniyuki KAKUSHIMA, Ahmet Parhat, KAZUO TSUTSUI, 西山彰, Nobuyuki Sugii, Kenji Natori, takeo hattori, HIROSHI IWAI. Experimental study of electron mobility characterization in direct contact La-silicate/Si structure based nMOSFETs, Solid-State Electronics, Vol. 74, pp. 2-6, Aug. 2012.
• マイマイティ マイマイティレャアティ, Miyuki Kouda, Takamasa Kawanago, Kuniyuki KAKUSHIMA, Ahmet Parhat, KAZUO TSUTSUI, 片岡 好則, 西山彰, Nobuyuki Sugii, KENJI NATORI, takeo hattori, HIROSHI IWAI. The effect of remote Coulomb scattering on electron mobility in La2O3 gate stacked MOSFETs, Semiconductor Science and Technology, Vol. 27, No. 4, Mar. 2012.
• Takamasa Kawanago, Kuniyuki KAKUSHIMA, Ahmet Parhat, KAZUO TSUTSUI, 西山彰, Nobuyuki Sugii, KENJI NATORI, takeo hattori, HIROSHI IWAI. Covalent Nature in La-Silicate Gate Dielectrics for Oxygen Vacancy Removal2, IEEE ELECTRON DEVICE LETTERS, Vol. 33, No. 3, pp. 423-425, Mar. 2012.
• H.D. Trinh, Yueh-Chin Lin, H.C. Wang, C.H. Chang, Kuniyuki KAKUSHIMA, HIROSHI IWAI, Takamasa Kawanago, Y.G. Lin, C.M. Chen, Y.Y.Wong, G.N. Huang, M. Hudait, E.Y. Chang. Effect of Postdeposition, Annealing Temperatures on Electrical Characteristics of Molecular-Beam-Deposited HfO2 on n-InAs/InGaAs Metal-Oxide-Semiconductor Capacitors, Applied Physics Express, Vol. 5, No. 2, pp. .021104-1-3, Feb. 2012.
• Takamasa Kawanago, 鈴木 拓也, Yeonghun Lee, Kuniyuki KAKUSHIMA, Ahmet Parhat, KAZUO TSUTSUI, 西山彰, Nobuyuki Sugii, KENJI NATORI, takeo hattori, HIROSHI IWAI. Compensation of oxygen defects in La-silicate gate dielectrics for improving effective mobility in high-k/metal gate MOSFET using oxygen annealing process, Solid-State Electronics, Vol. 68, pp. .68-72, Feb. 2012.
• Takamasa Kawanago, Yeonghun Lee, Kuniyuki KAKUSHIMA, Ahmet Parhat, KAZUO TSUTSUI, 西山彰, Nobuyuki Sugii, KENJI NATORI, takeo hattori, HIROSHI IWAI. EOT of 0.62 nm and High Electron Mobility in La-silicate/Si Structure Based nMOSFETs Achieved by Utilizing Metal-Inserted Poly-Si Stacks and Annealing at High Temperature, IEEE Transactions on Electron Devices, Vol. 59, No. 2, pp. 269-276, Feb. 2012.
• Miranda Enrique, Takamasa Kawanago, Kuniyuki KAKUSHIMA, J. Sune, HIROSHI IWAI. Analysis and modeling of the gate leakage current in advanced nMOSFET devices with severe gate–to-drain dielectric breakdown, Microelectronics Reliability, Vol. 52, pp. 1909-1912, 2012.
• Miyuki Kouda, Takamasa Kawanago, Ahmet Parhat, KENJI NATORI, takeo hattori, HIROSHI IWAI. Interface and electrical properties of Tm2O3 gate dielectrics for gate oxide scaling in MOS devices, Journal of Vacuum Science and Technology B, Vol. 29, No. 6, pp. 062202-1-4, Nov. 2011.
• Kuniyuki KAKUSHIMA, Koichi Okamoto, Tomotsune Koyanagi, Miyuki Kouda, Kiichi Tachi, Takamasa Kawanago, Jaeyeol Song, Ahmet Parhat, KAZUO TSUTSUI, Nobuyuki Sugii, takeo hattori, HIROSHI IWAI. Selection of rare earth silicates for highly scaled gate dielectrics, Microelectronic Engineering, Vol. 87, No. 10, pp. 1868-1871, Oct. 2010.
• Kuniyuki KAKUSHIMA, Kiichi Tachi, M.Adachi, Koichi Okamoto, Soshi Sato, Jaeyeol Song, Takamasa Kawanago, Ahmet Parhat, KAZUO TSUTSUI, Nobuyuki Sugii, takeo hattori, HIROSHI IWAI. Interface and electrical properties of La-silicate for direct contact of high-k with silicon, Solid-State Electronics, Vol. 54, pp. 715-719, June 2010.
• Kuniyuki KAKUSHIMA, Koichi Okamoto, Tomotsune Koyanagi, Miyuki Kouda, Kiichi Tachi, Takamasa Kawanago, Jaeyeol Song, Ahmet Parhat, Hiroshi Nohira, KAZUO TSUTSUI, Nobuyuki Sugii, takeo hattori, HIROSHI IWAI. SrO capping effect for La2O3/ Ce-Silicate gate dielectrics, Microelectronics Reliability 50, pp. 356-359, Mar. 2010.
• Y.C. Ong, D.S. Ang, K.L. Pey, S.J. O'Shea, K.E.J. Goh, C. Troadec, C.H. Thung, Takamasa Kawanago, Kuniyuki KAKUSHIMA, HIROSHI IWAI. Bilayer gate dielectric study by scanning tunneling microscopy, APPLIED PHYSICS LETTERS, Vol. 91, pp. 102905,, 2007.
• Takamasa Kawanago, Kiichi Tachi, Jaeyeol Song, Kuniyuki KAKUSHIMA, Ahmet Parhat, KAZUO TSUTSUI, Nobuyuki Sugii, takeo hattori, HIROSHI IWAI. Electrical characterization of directly deposited La-Sc oxides complex for gate insulator application, Microelectronic Engineering, Vol. 84, pp. 2335-2338, 2007.

国際会議発表 (査読有り)

• Ryosuke Kajikawa, Takamasa Kawanago, Iriya Muneta, Takuya Hoshii, Kuniyuki Kakushima, Kazuo Tsutsui, Hitoshi Wakabayashi. Self-Aligned WOx S/D Contacts to Gate Stacks with TiOx Nucleation Layer by Multiple-Deposition Method in WSe2 pFETs, International Conference on Solid State Devices and Materials, Sept. 2023.
• Ryo Ono, Shinya Imai, Takamasa Kawanago, Iriya Muneta, Kuniyuki Kakushima, Kazuo Tsutsui, Tetsuya Tatsumi, Shigetaka Tomiya, Hitoshi Wakabayashi. Improvement of MoS2 Film Quality by Solid-Phase Crystallization from PVD Amorphous MoSx Film, IEEE Electron Devices Technology and Manufacturing Conference (EDTM), Mar. 2023.  公式リンク  
  
• Takamasa Kawanago, Takahiro Matsuzaki, Ryosuke Kajikawa, Iriya Muneta, Takuya Hoshii, Kuniyuki Kakushima, Kazuo Tsutsui, Hitoshi Wakabayashi. Experimental Demonstration of High-Gain CMOS Inverter at Low Vdd Down to 0.5 V Consisting of WSe2 n/p FETs, International Conference on Solid State Devices and Materials, Sept. 2021.
• Takahiro Matsuzaki, Takamasa Kawanago, SHUNRI ODA. Impact of Contact Doping on Electrical Characteristics in WSe2 FET, The Electrochemical Society PRiME 2020, Oct. 2020.
• K. Matsuura, M. Hamada, T. Hamada, H. Tanigawa, T. Sakamoto, W. Cao, K. Parto, A. Hori, I. Muneta, T. Kawanago, K. Kakushima, K. Tsutsui, A. Ogura, K. Banerjee, H. Wakabayashi. Normally-Off Sputtered-MoS2 nMISFETs with MoSi2 Contact by Sulfur Powder Annealing and ALD Al2O3 Gate Dielectric for Chip Level Integration, Int. Workshop on Juction Technology (IWJT2019), June 2019.
• Tomoaki Oba, Takamasa Kawanago, Shunri Oda. Gated Four-Probe Method for Evaluation of Electrical Characteristics in MoS2 Field-Effect Transistors, The 10th annual Recent Progress in Graphene and Two-dimensional Materials Research Conference (RPGR2018), Oct. 2018.
• N. Nishizawa, T. Kawanago, K. Kakushima, H. Munekata. Formation of Ultra-thin, Crystalline AlOx Tunnel Barrier on GaAs and Vice Versa, 18th International Conference on Molecular Beam Epitaxy, Abstracts, p. 44, Sept. 2014.
• T. Seki, T. Kawanago, K. Kakushima, P. Ahmet, Y. Kataoka, A. Nishiyama, N. Sugii, K. Tsutsui, K. Natori, T. Hattori, H. Iwai. Electrical and Infrared Absorption Studies on La-silicate/Si Interface, IEEE 2nd Int. Symp. on Next Generation Electronics (ISNE 2013), Feb. 2013.
• Takamasa Kawanago, Kuniyuki KAKUSHIMA, 片岡好則, Akira Nishiyama, Nobuyuki Sugii, Hitoshi Wakabayashi, KAZUO TSUTSUI, Kenji Natori, HIROSHI IWAI. Advantage of TiN Schottky Gate over Conventional Ni for Improved Electrical Characteristics in AlGaN/GaN HEMT, ESSDERC 2013, 2013.
• T. Kawanago, K. Kakushima, P. Ahmet, Y. Kataoka, A. Nishiyama, N. Sugii, K. Tsutsui, K. Natori, T. Hattori, H. Iwai. (100)- and (110)-Oriented nMOSFETs with Highly Scaled EOT in La-Silicate/Si Interface for Multi-Gate Architecture, 42nd European Solid-State Device Research Conference (ESSDERC 2012), 2012.
• E. Mranda, Takamasa Kawanago, Kuniyuki KAKUSHIMA, J. Sune, HIROSHI IWAI. Analysis and modeling of the gate leakage current in advanced nMOSFET devices with severe gate–to-drain dielectric breakdown, ESREF2012, [588] E. Miranda, T. Kawanago, K. Kakushima, J. Sune, H. Iwai, “Analysis and modeling of the gate leakage current in advanced nMOSFET devices with severe gate–to-drain dielectric breakdown”, ESREF2012, October, 2012, Cagliari, Italy, 2012.
• Ahmet Parhat, 来山大祐, 金田翼, 鈴木 拓也, Tomotsune Koyanagi, Miyuki Kouda, マイマイティ マイマイティレャアティ, Takamasa Kawanago, Kuniyuki KAKUSHIMA, KAZUO TSUTSUI, 西山彰, Nobuyuki Sugii, KENJI NATORI, takeo hattori, HIROSHI IWAI. TiN/W/La2O3 /Si High-k Gate Stack for EOT below o.5nm, CSTIC2011, 2011.
• Ahmet Parhat, 来山大祐, 金田 翼, 鈴木 拓也, Tomotsune Koyanagi, Miyuki Kouda, M. Mamatrishat, Takamasa Kawanago, Kuniyuki KAKUSHIMA, HIROSHI IWAI. Scaling of EOT Beyond 0.5nm, ICSICT(International Conference on Solid-State and Integrated Circuit Technology)2010, Nov. 2010.
• M. Mamatrishat, Miyuki Kouda, Takamasa Kawanago, Kuniyuki KAKUSHIMA, Ahmet Parhat, A. Aierken, KAZUO TSUTSUI, 西山彰, Nobuyuki Sugii, KENJI NATORI, HIROSHI IWAI. Effect of Remote-Surface –Roughness Scattering on Electron Mobility in MOSFETs with High-k Dielectrics, ECS 218th Meeting, Oct. 2010.
• Takamasa Kawanago, Yeonghun Lee, Kuniyuki KAKUSHIMA, Ahmet Parhat, KAZUO TSUTSUI, 西山彰, Nobuyuki Sugii, KENJI NATORI, takeo hattori, HIROSHI IWAI. Optimized Oxygen Annealing Process for Vth Tuning of p-MOSFET with High-k/Metal Gate Stacks, ESSDERC 2010, 40th European Solid-State Device Research Conference, Sept. 2010.
• Kuniyuki KAKUSHIMA, Koichi Okamoto, Tomotsune Koyanagi, Kiichi Tachi, Miyuki Kouda, Takamasa Kawanago, Jaeyeol Song, Ahmet Parhat, KAZUO TSUTSUI, Nobuyuki Sugii, takeo hattori, HIROSHI IWAI. Selection of Rare Earth Silicate with SrO Capping for EOT Scaling below o.5 nm, ESSDERC 2009, 39th European Solid-State Device Research Conference, p. 403, Sept. 2009.
• Takamasa Kawanago, Jaeyeol Song, Kuniyuki KAKUSHIMA, Ahmet Parhat, KAZUO TSUTSUI, Nobuyuki Sugii, takeo hattori, HIROSHI IWAI. Experimental Study for High Efffective Mobility with directly deposited HfO2/La2O3 MOSFET, INFOS2009, Microelectronic Engineering, INFOS2009, Vol. 86, pp. 1629-1631, June 2009.
• K. Kakushima, K. Okamoto, K. Tachi, S. Sato, J. Song, T. Kawanago, P. Ahmet, N. Sugii, K. Tsutsui, T. Hattori, H. Iwai. Interfacial Dipole Measurement of Dielectric/Silicon Interface by X-ray Photoelectron Spectroscopy, 214th ECS Meeting (PRiME 2008), Oct. 2008.
• K. Kakushima, K. Tachi, M. Adachi, K. Okamoto, S. Sato, J. Song, T. Kawanago, P. Ahmet, K. Tsutsui, N. Sugii, T. Hattori, H. Iwai. Advantage of La2O3 Gate Dielectric Over HfO2 for Direct Contact and Mobility Improvment, the 38th European Solid-State Device Research Conference (ESSDERC2008), Sept. 2008.
• K. Kakushima, K. Okamoto, M. Adachi, K. Tachi, S. Sato, T. Kawanago, J. Song, P. Ahmet, N. Sugii, K. Tsutsui, T. Hattori, H. Iwai. Impact of Thin La2O3 Insertion for HfO2 MOSFET, 213th ECS Meeting, May 2008.
• Kuniyuki Kakushima, Kouichi Okamoto, Manabu Adachi, Kiichi Tachi, Jaeyeol Song, Soushi Sato, Takamasa Kawanago, Parhat Ahmet, Kazuo Tsutsui, Nobuyuki Sugii, Takeo Hattori, Hiroshi Iwai. Band Bending Measurement of HfO2/SiO2/Si Capacitor with ultra-thin La2O3 Insertion by XPS, Fifth International Symposium on Control of Semiconductor Interfaces (ISCSI2007), Nov. 2007.

国内会議発表 (査読有り)

• 幸田みゆき, 川那子高暢, 角嶋邦之, パールハット・アヘメト, 筒井一生, 杉井信之, 服部健雄, 岩井洋. Sc2O3ゲート絶縁膜のリーク電流機構の解析, 秋季第68回応用物理学会学術講演会, 秋季第68回応用物理学会学術講演会 講演予稿集, pp. 820, Sept. 2007.

国際会議発表 (査読なし・不明)

• Ryo Ikoma, Takamasa Kawanago, Yukio Kawano. Heavily-doped SOI with SAM-Based Gate Dielectrics in Application to TMDC FET, 232nd ECS Meeting, Oct. 2017.
• T. Kawanago, S. Oda. Self-Assembled Monolayer-Based Gate Dielectrics for MoS2 FETs, 230th ECS Meeting, Oct. 2016.
• 雷 一鳴, Shu Munekiyo, Kuniyuki KAKUSHIMA, Takamasa Kawanago, Yoshinori Kataoka, Akira Nishiyama, Nobuyuki Sugii, Hitoshi Wakabayashi, KAZUO TSUTSUI, Kenji Natori, HIROSHI IWAI, M. Furuhashi, N. Miura, S. Yamakawa. Interface reaction analysis of La2O3/SiC upon annealing by ATR-FTIR, The Workshop on Future Trend of Nanoelectronics:WIMNACT 39, February 7, 2014, Suzukake Hall, Suzukakedai Campus, Tokyo Institute of Technology, Japan, 2014.
• Takamasa Kawanago, Kuniyuki KAKUSHIMA, 片岡好則, 西山彰, Nobuyuki Sugii, Hitoshi Wakabayashi, KAZUO TSUTSUI, Kenji Natori, HIROSHI IWAI. Advantage of TiN Schottky Gate over Conventional Ni for Improved Electrical Characteristics in AlGaN/GaN HEMT,, The Workshop on Future Trend of Nanoelectronics:WIMNACT 39, 2014.
• Takamasa Kawanago, Kuniyuki KAKUSHIMA, パールハットアヘメト, 片岡好則, 西山彰, Nobuyuki Sugii, KAZUO TSUTSUI, Kenji Natori, takeo hattori, HIROSHI IWAI. Interface properties of La-silicate gate dielectrics on Si(110)surface, Workshop and IEEE EDS Mini-colloquium on Nanometer CMOS Technology (WIMNACT 37), 2013.
• Takamasa Kawanago, Yeonghun Lee, Kuniyuki KAKUSHIMA, Ahmet Parhat, KAZUO TSUTSUI, 西山彰, Nobuyuki Sugii, Kenji Natori, takeo hattori, HIROSHI IWAI. Metal Inserted Poly-Si wirh High Temperature Annealing for Achieving EOT of 0.62nm in La-silicate MOSFET, 41st European Solid-State Device Research Conference, 2013.
• Takamasa Kawanago, Kuniyuki KAKUSHIMA, パールハットアヘメト, 西山彰, Nobuyuki Sugii, KAZUO TSUTSUI, KENJI NATORI, takeo hattori, HIROSHI IWAI. Nitrogen incorporated La-silicate gate dielectric with high scalability, [G-COE PICE International Symposium and IEEE EDS Minicolloquium on Advanced Hybrid Nano Devices: Prospects by World’s Leading Scientists, 2013.
• Takamasa Kawanago, Yeonghun Lee, Kuniyuki KAKUSHIMA, パールハットアヘメト, KAZUO TSUTSUI, 西山彰, Nobuyuki Sugii, Kenji Natori, takeo hattori, HIROSHI IWAI. Characterization of Effective Electron Mobility in n/MOSFETs with Direct Contact La-silicate/Si Structure, 15th International Conference on Thin Films, 2013.
• Takamasa Kawanago, Kuniyuki KAKUSHIMA, パールハットアヘメト, 片岡好則, Akira Nishiyama, Nobuyuki Sugii, KAZUO TSUTSUI, Kenji Natori, takeo hattori, HIROSHI IWAI. Interface properties of La-silicate gate dielectrics on Si(110)surface, Workshop and IEEE EDS Mini-colloquium on Nanometer CMOS Technology (WIMNACT 37), 2013.
• 関拓也, Takamasa Kawanago, Kuniyuki KAKUSHIMA, パールハットアヘメト, 片岡好則, Akira Nishiyama, Nobuyuki Sugii, KAZUO TSUTSUI, Kenji Natori, takeo hattori, HIROSHI IWAI. Infrared absorption study of La-silicate gate dielectrics, Workshop and IEEE EDS Mini-colloquium on Nanometer CMOS Technology (WIMNACT 37), 2013.
• 関拓也, Takamasa Kawanago, Kuniyuki KAKUSHIMA, パールハットアヘメト, 片岡好則, Akira Nishiyama, Nobuyuki Sugii, KAZUO TSUTSUI, Kenji Natori, takeo hattori, HIROSHI IWAI. International Symposium on Next-Generation Electronics(ISNE 2013), International Symposium on Next-Generation Electronics(ISNE 2013), 2013.
• Miranda Enrique, Takamasa Kawanago, Kuniyuki KAKUSHIMA, J. Sune, HIROSHI IWAI. Modeling of the Output Characteristics of Advanced N-MOSFETs After a Severe Gate-to-Channel Dielectric Breakdown, Insulating Films on Semiconductors(INFOS 2013), 2013.
• Takamasa Kawanago, Kuniyuki KAKUSHIMA, パールハットアヘメト, 片岡好則, 西山彰, Nobuyuki Sugii, KAZUO TSUTSUI, Kenji Natori, takeo hattori, HIROSHI IWAI. (100)-and (110)-oriented nMOSFETs with highly Scaled EOT in La-silicate/Si Interface for Multi-gate Architecture, ESSDERC 2012, 2012.
• Takamasa Kawanago, Kuniyuki KAKUSHIMA, パールハットアヘメト, 片岡好則, 西山彰, Nobuyuki Sugii, KAZUO TSUTSUI, Kenji Natori, takeo hattori, HIROSHI IWAI. (100)-and (110)-oriented nMOSFETs with highly Scaled EOT in La-silicate/Si Interface for Multi-gate Architecture, ESSDERC 2012, 2012.
• Kuniyuki KAKUSHIMA, Yuya Suzuki, ダリューシュザデ, Takamasa Kawanago, HIROSHI IWAI. Development of Core Technologies for Green Nanoelectronics, International Symposium on “Development of Core Technologies for Green Nanoelectronics”, 2012.
• Takamasa Kawanago, Kuniyuki KAKUSHIMA, パールハットアヘメト, 西山彰, Nobuyuki Sugii, KAZUO TSUTSUI, Kenji Natori, takeo hattori, HIROSHI IWAI. Nitrogen incorporated La-silicate gate dielectric with high scalability, IEEE EDS MQ WIMNACT 32 C0-sponsored by EDS Japan Chapter and TIT, 2012.
• Takamasa Kawanago, Kuniyuki KAKUSHIMA, Ahmet Parhat, KAZUO TSUTSUI, 西山彰, Nobuyuki Sugii, KENJI NATORI, takeo hattori, HIROSHI IWAI. Metal Inserted Poly-Si Stacks with La2O3 Gate Dielectrics for Scaled EOT and VFB Control by Oxygen Incorporation, CSTIC2011, 2011.
• Ahmet Parhat, 来山大祐, 金田翼, 鈴木 拓也, Tomotsune Koyanagi, Miyuki Kouda, マイマイティ マイマイティレャアティ, Takamasa Kawanago, Kuniyuki KAKUSHIMA, KAZUO TSUTSUI, 西山彰, Nobuyuki Sugii, KENJI NATORI, takeo hattori, HIROSHI IWAI. Effects of Metal Layer Insertion on EOT scaling in TiN/Metal/ La2O3 Si High –k Gate Stacks, ,219th ECS Meeting, 2011.
• Takamasa Kawanago, 鈴木 拓也, Kuniyuki KAKUSHIMA, Ahmet Parhat, KAZUO TSUTSUI, 西山彰, Nobuyuki Sugii, KENJI NATORI, takeo hattori, HIROSHI IWAI. An effective process for oxygen defect suppression for La-based oxide gate dielectric, Taiwan-Japan Workshop on “Nano Devices”, 2011.
• Kuniyuki KAKUSHIMA, Tomotsune Koyanagi, 来山大祐, Miyuki Kouda, Jaeyeol Song, Takamasa Kawanago, M. Mamatrishat, Kiichi Tachi, M. K. Bera, Ahmet Parhat, Hiroshi Nohira, KAZUO TSUTSUI, 西山彰, Nobuyuki Sugii, KENJI NATORI, takeo hattori, Keisaku Yamada, HIROSHI IWAI. Direct Contact of High-k/Si Gate Stack for EOT below 0.7 nm using LaCe-silicate Layer with Vfb controllability, 2010 Symposium on VLSI Technology, June 2010.

国内会議発表 (査読なし・不明)

• 今井 慎也, 梶川 亮介, 川那子 高暢, 宗田 伊理也, 角嶋 邦之, 辰巳 哲也, 冨谷 茂隆, 筒井 一生, 若林 整. スパッタMoS2膜に対するエッジ金属コンタクトの電流電圧特性, 第84回応用物理学会秋季学術講演会, Sept. 2023.
• 寺岡 楓, 今井 慎也, 黒原 啓太, 伊東 壮真, 川那子 高暢, 宗田 伊理也, 角嶋 邦之, 若林 整. Ni/Al2O3/スパッタWS2コンタクトの電流電圧特性, 第84回応用物理学会秋季学術講演会, Sept. 2023.
• 梶川 亮介, 川那子 高暢, 宗田 伊理也, 星井 拓也, 角嶋 邦之, 筒井 一生, 若林 整. トップゲートに自己整合したWOx S/Dを用いた30-50 nm膜厚WSe2バックチャネルpFET, 第84回応用物理学会秋季学術講演会, Sept. 2023.
• Peilong Wang, Atsushi Hori, Iriya Muneta, Takamasa Kawanago, Kuniyuki Kakushima, Kazuo Tsutsui, Hitoshi Wakabayashi. Self-heating and Short-Channel Effect Immunity with Partial-Bottom-Dielectric-Isolation for Gate-All-Around Nano-Sheet FETs, 70th JSAP Spring meeting, Mar. 2023.
• 水谷 一翔, 星井 拓也, 川那子 高暢, 宗田 伊理也, 若林 整, 筒井 一生, 角嶋 邦之. 希土類酸化物キャッピングによるY:HfO2キャパシタの信頼性改善, 第83回応用物理学会秋季学術講演会, Sept. 2022.
• 川那子 高暢, 梶川 亮介, 水谷 一翔, Tsai Sung Lin, 宗田 伊理也, 星井 拓也, 角嶋 邦之, 筒井 一生, 若林 整. アルミニウムスカンジウム合金(AlSc)と酸化タングステン(WOx)をソース/ドレイン電極に用いたWSe2 n/p FETとCMOSインバータ応用, 第83回応用物理学会秋季学術講演会, Sept. 2022.
• 松浦 賢太朗, 濱田 昌也, 濱田 拓也, 谷川 晴紀, 坂本 拓朗, 堀 敦, 宗田 伊理也, 川那子 高暢, 角嶋 邦之, 筒井 一生, 小椋 厚志, 若林 整. 大面積集積化に向けたスパッタ堆積ノーマリーオフMoS2-nMISFETs, 第67回応用物理学会春期学術講演会, Mar. 2020.
• 松﨑貴広, 大場智昭, 川那子高暢, 小田俊理. PVAによるMoS2FETへのキャリアドーピングと電気特性への影響, 2019年 第80回 応用物理学会秋季学術講演会, Sept. 2019.
• 大場智昭, 川那子高暢, 小田俊理. ゲート付き4 端子法によるMoS2 FET の電気特性評価, 2018年 第79回 応用物理学会秋季学術講演会, 第79回応用物理学会秋季学術講演会 講演予稿集, 公益社団法人 応用物理学会, Sept. 2018.
• 居駒遼, 川那子高暢, 河野行雄. 剥離転写法による高濃度ドープSOI基板を用いたTMDC-FETの作製, 第７８回応用物理学会秋季学術講演, Sept. 2017.
• 川那⼦⾼暢, 居駒遼, Du Wanjing, ⼩⽥俊理. ⾃⼰組織化単分⼦膜を⽤いたadhesion lithographyによるMoS2 FETの作製, 第64回応用物理学会春季学術講演会, Mar. 2017.
• 杜 婉静, 川那子 高暢, 小田 俊理. Multifunctional Phosphonic Acid Self-Assembled Monolayer for Metal Patterning, 第77回応用物理学会秋季学術講演会, Sept. 2016.
• 河野行雄, 居駒遼, 川那子高暢, 小田俊理. ジデシルホスホン酸(C12H25-PA)をゲート絶縁膜の用いたMoS2 FETの作製, 第７７回応用物理学会秋季学術講演, Sept. 2016.
• 川那子 高暢, 小田 俊理. 自己組織化単分子膜をゲート絶縁膜に用いた低電圧駆動MoS2 FETの作製, 第63回応用物理学会春季学術講演会, June 2016.
• 本田 拓夢, 米田 淳, 武田 健太, 川那子 高暢, 小寺 哲夫, 樽茶 清悟, 小田 俊理. 多層Al ゲート構造を用いたSi-MOS 量子ドットデバイス作製プロセスの検討, 第63回応用物理学会春季学術講演会, Mar. 2016.
• 雷 一鳴, 宗清修, 角嶋邦之, 川那子高暢, 片岡好則, 西山彰, 杉井信之, 若林整, 筒井一生, 名取研二, 岩井洋, 古橋 壮之, 三浦 成久, 山川 聡. ATR-FTIR法を用いた熱処理によるLa2O3/SiC界面反応の解析, 第61回応用物理学会春季学術講演会, 2014.
• 譚錫昊, 川那子高暢, 角嶋邦之, 片岡好則, 西山彰, 杉井信之, 若林整, 筒井一生, 名取研二, 岩井洋. 高電圧ストレスによるAlGaN/GaNの界面とバルクトラップの測定に関する研究, 第61回応用物理学会春季学術講演会, 2014.
• 川那子高暢, 角嶋邦之, 岩井洋. 高速・低損失の電子デバイス／パワーデバイスの先導研究, STARCワークショップ2013, 2013.
• 宗清修, 川那子高暢, 角嶋邦之, 片岡好則, 西山彰, 杉井信之, 若林整, 筒井一生, 名取研二, 岩井洋. ショットキーゲート材料によるAlGaN/GaNの容量電圧特性への影響, 第74回応用物理学会秋季学術講演会, 2013.
• 田中 祐樹, 川那子高暢, 角嶋邦之, パールハットアヘメト, 筒井一生, 西山彰, 杉井信之, 名取研二, 服部健雄, 岩井洋. シリコン基板上に堆積したナノカーボン薄膜への高温短時間アニーリングの影響, 第72回応用物理学会学術講演会, 2011.
• 鈴木 拓也, 川那子高暢, 角嶋邦之, パールハットアヘメト, 筒井一生, 西山彰, 杉井信之, 名取研二, 服部健雄, 岩井洋. 希釈酸素雰囲気熱処理を用いたLaシリケート/Si MOS構造のVFB/Vthシフトの低EOTへの適用, 第７１回応用物理学会学術講演会, Sept. 2010.
• 角嶋邦之, 小柳友常, 来山大祐, 幸田みゆき, 宋在烈, 佐藤創志, 川那子高暢, M. マイマイティ, 舘喜一, M.K. Bera, パールハットアヘメト, 野平博司, 筒井一生, 西山彰, 杉井信之, 名取研二, 服部健雄, 山田啓作, 岩井洋. LaCe シリケート膜を用いたEOT<0.7nm の直接接合 high-k/Si の実現とフラットバンド電圧制御, 応用物理学会分科会 シリコンテクノロジー, ，野平博司，筒井一生，西山彰，杉井信之，名取研二，服部健雄，山田啓作，岩井洋“LaCe シリケート膜を用いたEOT<0.7nm の直接接合 high-k/Si の実現とフラットバンド電圧制御” 応用物理学会分科会 シリコンテクノロジー No.127 pp.4-8（2010年7月22日 ）, No. 127, pp. 4-8, July 2010.
• 川那子高暢, 角嶋邦之, パールハットアヘメト, 筒井一生, 西山彰, 杉井信之, 名取研二, 服部健雄, 岩井洋. 酸素添加がWゲートMOSデバイスの電気特性に与える影響, 第57回応用物理学関係連合講演会, 第57回応用物理学関係連合講演会講演予稿集, pp. 13-151, Mar. 2010.
• 川那子高暢, 鈴木 拓也, 角嶋邦之, パールハットアヘメト, 筒井一生, 西山彰, 杉井信之, 名取研二, 服部健雄, 岩井洋. An Effective Process for Oxygen Defects Suppression for La-based Oxide Gate Dielectric, 複合創造領域シンポジウム, 2010.
• Takamasa Kawanago, Kuniyuki KAKUSHIMA, Ahmet Parhat, KAZUO TSUTSUI, 西山彰, Nobuyuki Sugii, KENJI NATORI, takeo hattori, HIROSHI IWAI. Experimental Investigation of VFB shift and Effective Mobility in La2O3 MOS Devices, G-COE PICE International Symposium on Silicon Nano Devices, Oct. 2009.
• 又野克哉, 川那子高暢, 角嶋邦之, パールハットアヘメト, 筒井一生, 杉井信之, 服部健雄, 岩井洋. Ge層挿入によるLa2O3-MOSキャパシタのVFB制御, 第56回応用物理学関係連合講演会, 第56回応用物理学関係連合講演会予稿集, 応用物理学会, No. 2, pp. 854, Mar. 2009.
• 川那子高暢, 角嶋邦之, パールハットアヘメト, 筒井一生, 杉井信之, 服部健雄, 岩井洋. La2O3/Si直接接合構造における界面特性の評価, 秋季第69回応用物理学会学術講演会, 秋季第69回応用物理学会学術講演会予稿集, 応用物理学会, No. 2, pp. 702, Sept. 2008.

特許など

• 角嶋邦之, 川那子高暢, 宗清修, LEIYIMING, 古橋　壮之, 三浦　成久. 半導体装置及びその製造方法. 特許. 登録. 国立大学法人東京工業大学, 三菱電機株式会社. 2014/08/28. 特願2014-173714. 2016/04/07. 特開2016-048758. 特許第6270667号. 2018/01/12 2018.

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